ASIC Implementation Engineer - Synthesis Sunnyvale, CA +1 locations - Infrastructure - Engineer[...]
Company: Meta
Location: Sunnyvale
Posted on: April 20, 2025
Job Description:
Meta is hiring ASIC Implementation Engineers within our
Infrastructure organization. We are looking for individuals with
experience in front-end implementation from RTL to netlist,
including RTL Lint, CDC analysis, timing constraints, synthesis to
build efficient System on Chip (SoC) and IP for data center
applications.ASIC Implementation Engineer - Synthesis
Responsibilities
- Run Logic/Physical Synthesis using advanced optimization
techniques and generate optimized Gate Level Netlist for Timing,
Area, Power.
- Debug the timing/area/congestion issues and work with RTL &
Physical designers to resolve them.
- Perform Power Estimation at RTL and Gate Level and identify
power reduction opportunities.
- Run Formal Verification checks between RTL and Gate level
netlist and debug the aborts, inconclusive and Logic Equivalency
failures.
- Perform RTL Lint and work with the Designers to create
waivers.
- Perform RTL DFT Analysis and improve the DFT coverage for
Stuck-at faults.
- Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA
for the blocks and the top-level including SOC.
- Analyze the inter-block timing and come up with IO budgets for
the various partition blocks.
- Developing Automation scripts and Methodology for all FE-tools
including (Lint, CDC, RDC, Synthesis, STA, Power).
- Work closely with the Design Engineers, DV Engineers, Emulation
Engineers in supporting them with the handoff tasks.
- Interact with Physical Design Engineers and provide them with
timing/congestion feedback.Minimum Qualifications
- 3+ years of experience as a Front End Synthesis & Integration
Engineer.
- Experience with RTL Synthesis and design optimization for
Power, Performance, Area.
- Knowledge of front-end and back-end ASIC tools.
- Experience with RTL design using SystemVerilog or other
HDL.
- Experience managing multiple design releases and working with
cross functional teams to support and debug timing, area, power
issues.
- Experience with communicating across functional internal teams
and vendors.
- Currently has, or is in the process of obtaining a Bachelor's
degree in Computer Science, Computer Engineering, relevant
technical field, or equivalent practical experience. Degree must be
completed prior to joining Meta.Preferred Qualifications
- Experience in SOC Design Integration and Front-End
Implementation.
- Knowledge of Physical Design flow such as Floorplanning, CTS,
Routing.
- Good Understanding of Timing/physical libraries, SRAM
Memories.
- Knowledge of STA signoff and understanding of AOCV, POCV.
- Experience with low power techniques for reducing power.
- Experience with EDA tools and scripting languages (Python, TCL)
used to build tools and flows.
- Experience with Design Compiler, Spyglass, PrimeTime, Formality
or equivalent tools.For those who live in or expect to work from
California if hired for this position, please click here for
additional information.About MetaMeta builds technologies that help
people connect, find communities, and grow businesses. When
Facebook launched in 2004, it changed the way people connect. Apps
like Messenger, Instagram and WhatsApp further empowered billions
around the world. Now, Meta is moving beyond 2D screens toward
immersive experiences like augmented and virtual reality to help
build the next evolution in social technology. People who choose to
build their careers by building with us at Meta help shape a future
that will take us beyond what digital connection makes possible
today-beyond the constraints of screens, the limits of distance,
and even the rules of physics.$114,000/year to $166,000/year +
bonus + equity + benefitsIndividual compensation is determined by
skills, qualifications, experience, and location. Compensation
details listed in this posting reflect the base hourly rate,
monthly rate, or annual salary only, and do not include bonus,
equity or sales incentives, if applicable. In addition to base
compensation, Meta offers benefits. Learn more about benefits at
Meta.Meta is proud to be an Equal Employment Opportunity employer.
We do not discriminate based upon race, religion, color, national
origin, sex (including pregnancy, childbirth, reproductive health
decisions, or related medical conditions), sexual orientation,
gender identity, gender expression, age, status as a protected
veteran, status as an individual with a disability, genetic
information, political views or activity, or other applicable
legally protected characteristics. You may view our Equal
Employment Opportunity notice here.Meta is committed to providing
reasonable accommodations for qualified individuals with
disabilities and disabled veterans in our job application
procedures. If you need assistance or an accommodation due to a
disability, fill out the Accommodations request form.Apply for this
job.Take the first step toward a rewarding career at Meta.Explore
jobs that match your skills and experience. Search by technology,
team or location to find an opening that's right for you.
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Keywords: Meta, Santa Rosa , ASIC Implementation Engineer - Synthesis Sunnyvale, CA +1 locations - Infrastructure - Engineer[...], Engineering , Sunnyvale, California
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